US 12,461,799 B2
Safe, secure, virtualized, domain specific hardware accelerator
Kedar Satish Chitnis, Bengaluru (IN); Charles Lance Fuoco, Allen, TX (US); Sriramakrishnan Govindarajan, Bengaluru (IN); Mihir Narendra Mody, Bengaluru (IN); William A. Mills, Clarksburg, MD (US); Gregory Raymond Shurtz, Houston, TX (US); and Amritpal Singh Mundra, Allen, TX (US)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Apr. 10, 2023, as Appl. No. 18/132,683.
Application 18/132,683 is a division of application No. 17/138,036, filed on Dec. 30, 2020, granted, now 11,656,925.
Application 17/138,036 is a continuation of application No. 16/377,404, filed on Apr. 8, 2019, granted, now 10,929,209, issued on Feb. 23, 2021.
Claims priority of provisional application 62/786,616, filed on Dec. 31, 2018.
Prior Publication US 2023/0244557 A1, Aug. 3, 2023
Int. Cl. G06F 9/54 (2006.01); G06F 9/38 (2018.01); G06F 9/455 (2018.01); G06F 9/48 (2006.01); G06F 9/50 (2006.01)
CPC G06F 9/546 (2013.01) [G06F 9/3836 (2013.01); G06F 9/45558 (2013.01); G06F 9/4806 (2013.01); G06F 9/5027 (2013.01); G06F 2009/45583 (2013.01); G06F 2009/45587 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a first processor;
a second processor;
a controller;
a first inter-processor communication (IPC) interface coupled between the first processor and the controller;
a second IPC interface coupled between the second processor and the controller;
a first hardware accelerator coupled to the controller; and
a second hardware accelerator coupled to the controller,
wherein the first IPC interface comprises a firewall configured to prevent access to the first IPC based on a hardware resource identifier.