US 12,461,787 B2
Method of task transition between heterogenous processors
Alexander J. Branover, Boxborough, MA (US); Benjamin Tsien, Santa Clara, CA (US); and Elliot H. Mednick, Boxborough, MA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Feb. 3, 2023, as Appl. No. 18/164,315.
Application 18/164,315 is a continuation of application No. 16/709,404, filed on Dec. 10, 2019, granted, now 11,586,472.
Prior Publication US 2023/0185623 A1, Jun. 15, 2023
Int. Cl. G06F 9/50 (2006.01); G06F 11/30 (2006.01)
CPC G06F 9/5044 (2013.01) [G06F 9/5094 (2013.01); G06F 11/3024 (2013.01); G06F 11/3062 (2013.01); G06F 2209/501 (2013.01); G06F 2209/508 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for relocating a task from a first processor to a second processor, the method comprising:
monitoring one or more metrics associated with execution of the task by the first processor;
comparing at least one metric of the one or more metrics of the task to a threshold;
copying an architecture state of the first processor to a memory of the second processor based on the comparing, wherein the memory is dedicated to storing the architecture state and the architecture state includes one or more register settings and one or more flag settings of the first processor; and
executing the task on the second processor using the architecture state copied from the first processor and stored in the memory of the second processor.