US 12,461,710 B2
Reformatting matrices to improve computing efficiency
Manoj Kumar, Yorktown Heights, NY (US); Pratap C. Pattnaik, Yorktown Heights, NY (US); Kattamuri Ekanadham, Mohegan Lake, NY (US); Jessica Tseng, Fremont, CA (US); and Jose E. Moreira, Irvington, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Sep. 26, 2021, as Appl. No. 17/485,455.
Application 17/485,455 is a division of application No. 16/205,208, filed on Nov. 29, 2018, granted, now 11,163,528.
Prior Publication US 2022/0012010 A1, Jan. 13, 2022
Int. Cl. G06F 7/08 (2006.01); G06F 7/24 (2006.01); G06F 7/78 (2006.01); G06F 17/16 (2006.01); G06F 7/26 (2006.01)
CPC G06F 7/08 (2013.01) [G06F 7/24 (2013.01); G06F 7/78 (2013.01); G06F 17/16 (2013.01); G06F 7/26 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A data ordering device, comprising:
a plurality of inputs N;
a plurality of outputs M;
a sorting network coupled between the plurality of inputs N and the plurality of outputs M;
one or more latches comprising an input buffer coupled between each input of the plurality of inputs N and a corresponding input of the sorting network;
one or more latches comprising an output buffer coupled between each output of the plurality of outputs M and a corresponding output of the sorting network, wherein the sorting network is coupled between the input buffer and the output buffer;
one or more private vector registers coupled between the plurality of inputs N and the input buffer;
one or more private vector registers coupled between the plurality of outputs M and the output buffer; and
an input for a control signal operative to initiate a sorting of data between the plurality of inputs N and the plurality of outputs M.