US 12,461,680 B2
Operation based on consolidated memory region description data
David Matthew Springberg, Fort Collins, CO (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 4, 2024, as Appl. No. 18/733,495.
Application 18/733,495 is a continuation of application No. 17/896,914, filed on Aug. 26, 2022, granted, now 12,026,395.
Application 17/896,914 is a continuation of application No. 17/196,584, filed on Mar. 9, 2021, granted, now 11,449,272.
Prior Publication US 2024/0319912 A1, Sep. 26, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0676 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory system comprising:
a memory device; and
a processing device, operatively coupled to the memory device, configured to perform operations comprising:
in response to a request from a host system to write requested data to the memory device of the memory system:
generating consolidated memory region description data for the host system by identifying a set of contiguous memory regions in a set of individual memory regions of the host system that provide the requested data for writing, the set of individual memory regions of the host system being described by memory region description data specified by the request, the consolidated memory region description data for the host system comprising:
a single descriptor for each contiguous memory region in the set of contiguous memory regions of the host system; and
a single descriptor for each individual memory region of the set of individual memory regions of the host system that is excluded from the set of contiguous memory regions of the host system; and
performing a write operation on the memory device based on the consolidated memory region description data for the host system.