US 12,461,666 B2
Reducing power consumption by using a different memory chip for background processing
Gabriel Zvi BenHanokh, Tel-Aviv (IL); and Adam Kupczyk, Tulce (PL)
Assigned to Red Hat, Inc., Raleigh, NC (US)
Filed by RED HAT, INC., Raleigh, NC (US)
Filed on Sep. 21, 2021, as Appl. No. 17/480,527.
Prior Publication US 2023/0088572 A1, Mar. 23, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0625 (2013.01) [G06F 3/0647 (2013.01); G06F 3/0653 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A system comprising:
a processor; and
a memory including instructions that are executable by the processor for causing the processor to:
determine a condition of an application programming interface (API) that is to be satisfied to use a smaller dynamic random access memory (DRAM) chip of a device that is smaller and consumes less power than a main DRAM chip of the device for background processing;
determine a portion of the smaller DRAM chip that is allocated for a first application;
determine, in response to determining that the condition is satisfied for the first application executing on the device, that the first application complies with the API for using the smaller DRAM chip for the background processing, the condition being associated with the portion of the smaller DRAM chip that is allocated for the first application;
determine the device is inactive;
perform, by the API and in response to determining that the device is inactive, the background processing for the first application using the smaller DRAM chip;
determine that an event associated with the first application occurs;
determine the device is active in response to determining that the event associated with the first application occurs; and
in response to the event and determining that the device is active, perform foreground processing for the first application using the main DRAM chip while the smaller DRAM chip performs the background processing for the first application.