US 12,461,552 B2
Clock distribution network, and semiconductor device and semiconductor system including the clock distribution network
Ji Hyo Kang, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on May 19, 2023, as Appl. No. 18/320,701.
Claims priority of application No. 10-2022-0171442 (KR), filed on Dec. 9, 2022.
Prior Publication US 2024/0192722 A1, Jun. 13, 2024
Int. Cl. G06F 1/10 (2006.01); G06F 1/06 (2006.01); G06F 1/08 (2006.01); G06F 1/12 (2006.01)
CPC G06F 1/10 (2013.01) [G06F 1/06 (2013.01); G06F 1/08 (2013.01); G06F 1/12 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A clock distribution network comprising:
a global clock generation circuit configured to divide a system clock signal to generate a first group of division clock signals, and to divide at least some of the first group of division clock signals to generate a second group of division clock signals; and
a data clock generation circuit configured to generate a first group of data clock signals based on at least some of the first group of division clock signals and the system clock signal, and to generate a second group of data clock signals based on at least some of the second group of division clock signals and at least some of the first group of data clock signals.