| CPC G02B 6/428 (2013.01) [G02B 6/4284 (2013.01); G02B 6/43 (2013.01); H01L 25/167 (2013.01)] | 18 Claims |

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1. A semiconductor device comprising:
a first substrate comprising a first top surface and a first bottom surface, the first top surface comprising a first region, a second region and a third region, the third region being positioned between the first region and the second region, the first region comprising a first plurality of electrical contacts, the second region comprising a second plurality of electrical contacts, the third region comprising a third plurality of electrical contacts;
an integrated circuit comprising a fourth plurality of electrical contacts, the fourth plurality of electrical contacts being electrically coupled to the third plurality of electrical contacts;
a second substrate comprising a fourth region and a fifth region, the fourth region comprising a fifth plurality of electrical contacts electrically coupled to the first plurality of electrical contacts, the fourth region being positioned over the first region, the fifth region being positioned outside the first substrate;
a third substrate comprising a sixth region and a seventh region, the sixth region comprising a sixth plurality of electrical contacts electrically coupled to the second plurality of electrical contacts, the sixth region being positioned over the second region, the seventh region being positioned outside the first substrate;
a stiffener ring coupled to the fourth region and the sixth region, the stiffener ring comprising an opening exposing a portion of the third region;
an electrical connector electrically coupled to the second substrate; and
an optical connector coupled to the third substrate.
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