US 12,133,432 B2
Display substrate and display apparatus
Yudiao Cheng, Beijing (CN); Binyan Wang, Beijing (CN); Yue Long, Beijing (CN); and Weiyun Huang, Beijing (CN)
Assigned to CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/629,106
Filed by CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Apr. 30, 2021, PCT No. PCT/CN2021/091475
§ 371(c)(1), (2) Date Jan. 21, 2022,
PCT Pub. No. WO2022/226996, PCT Pub. Date Nov. 3, 2022.
Prior Publication US 2023/0320145 A1, Oct. 5, 2023
Int. Cl. H10K 59/131 (2023.01); G09G 3/3258 (2016.01); H10K 59/88 (2023.01)
CPC H10K 59/131 (2023.02) [G09G 3/3258 (2013.01); H10K 59/88 (2023.02); G09G 2300/0408 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2320/0209 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A display substrate, comprising:
a base substrate, comprising a first display region and a second display region, wherein
the first display region is located at a periphery of the second display region;
the first display region comprises a plurality of first light-emitting elements, a plurality of first pixel circuits, a plurality of second pixel circuits, and a plurality of third pixel circuits;
the plurality of first pixel circuits are connected with the plurality of first light-emitting elements in one-to-one correspondence; the second display region comprises a plurality of second light-emitting elements; the plurality of second pixel circuits are connected with the plurality of second light-emitting elements in one-to-one correspondence; the third pixel circuit is a dummy pixel circuit;
a plurality of data lines, located on the base substrate and not passing through the second display region, wherein, the plurality of data lines comprise a plurality of first data lines and a plurality of second data lines, respective first data lines are configured to be connected with the first pixel circuits, and respective second data lines are configured to be connected with at least the second pixel circuits;
wherein, in a direction perpendicular to the base substrate, part of the plurality of third pixel circuits overlap with the plurality of second data lines, and at least part of the third pixel circuits overlapping with the second data lines are insulated from the second data lines;
wherein the respective first data lines extend along a first direction; the first data line of which an extension line does not pass through the second display region among the plurality of first data lines is configured to transmit a data signal to M first pixel circuits, the respective second data lines are configured to transmit signals to N pixel circuits, M>N, and the N pixel circuits at least comprise the second pixel circuit;
wherein the second data line comprises a first sub-data line and a second sub-data line extending along the first direction, and an adapt line connecting the first sub-data line and the second sub-data line;
the first sub-data line, the second sub-data line, and the first data line are arranged in a same layer;
the first sub-data line is configured to be connected with the first pixel circuit; and
the second sub-data line is configured to be connected with the second pixel circuit.