US 12,133,110 B2
Efficient uplink scheduling mechanisms for dual connectivity
Prateek Basu Mallick, Langen (DE); Joachim Loehr, Wiesbaden (DE); and Hidetoshi Suzuki, Kanagawa (JP)
Assigned to Sun Patent Trust, New York, NY (US)
Filed by Sun Patent Trust, New York, NY (US)
Filed on Apr. 28, 2023, as Appl. No. 18/309,368.
Application 18/309,368 is a continuation of application No. 17/370,864, filed on Jul. 8, 2021, granted, now 11,678,217.
Application 17/370,864 is a continuation of application No. 16/850,475, filed on Apr. 16, 2020, granted, now 11,096,084, issued on Aug. 17, 2021.
Application 16/850,475 is a continuation of application No. 16/440,029, filed on Jun. 13, 2019, granted, now 10,667,171, issued on May 26, 2020.
Application 16/440,029 is a continuation of application No. 15/851,631, filed on Dec. 21, 2017, granted, now 10,368,266, issued on Jul. 30, 2019.
Application 15/851,631 is a continuation of application No. 15/024,751, granted, now 9,883,419, issued on Jan. 30, 2018, previously published as PCT/JP2014/004323, filed on Aug. 22, 2014.
Claims priority of application No. 13004707 (EP), filed on Sep. 27, 2013; and application No. 13198976 (EP), filed on Dec. 20, 2013.
Prior Publication US 2023/0269623 A1, Aug. 24, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H04W 28/02 (2009.01); H04W 16/32 (2009.01); H04W 28/082 (2023.01); H04W 72/21 (2023.01); H04W 80/02 (2009.01); H04W 80/06 (2009.01); H04W 84/04 (2009.01)
CPC H04W 28/0278 (2013.01) [H04W 16/32 (2013.01); H04W 28/082 (2023.05); H04W 72/21 (2023.01); H04W 80/02 (2013.01); H04W 80/06 (2013.01); H04W 84/045 (2013.01)] 6 Claims
OG exemplary drawing
 
1. An integrated circuit for controlling a master base station, the integrated circuit comprising:
control circuitry, which, in operation, controls a connection to a user equipment, which connects to the master base station and to a secondary base station via a split bearer that is split between the master base station and the secondary base station in a Packet Data Convergence Protocol (PDCP) layer; wherein
responsive to a total buffer occupancy of the PDCP layer in the user equipment exceeding a threshold, the total buffer occupancy of the PDCP layer is split into a first PDCP buffer occupancy value for the master base station and a second PDCP buffer occupancy value for the secondary base station; and
responsive to the total buffer occupancy not exceeding the threshold, one of the first and second PDCP buffer occupancy values is set to the total buffer occupancy, and the other one of the first and second PDCP buffer occupancy values is set to zero; and
reception circuitry, which is coupled to the control circuitry and which, in operation, receives a first buffer status report based on the first PDCP buffer occupancy value from the user equipment responsive to the first PDCP buffer occupancy value being more than zero.