US 12,132,491 B2
Semiconductor device and operating method thereof
Kyungho Ryu, Suwon-si (KR); Yongil Kwon, Suwon-si (KR); Kilhoon Lee, Suwon-si (KR); Jung-Pil Lim, Suwon-si (KR); and Hyunwook Lim, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Dec. 5, 2022, as Appl. No. 18/074,775.
Claims priority of application No. 10-2022-0061880 (KR), filed on May 20, 2022.
Prior Publication US 2023/0378963 A1, Nov. 23, 2023
Int. Cl. H04L 7/00 (2006.01); G06F 1/10 (2006.01); G11C 7/22 (2006.01); H03L 7/091 (2006.01); H04L 7/033 (2006.01)
CPC H03L 7/091 (2013.01) [G06F 1/10 (2013.01); G11C 7/222 (2013.01); H04L 7/0037 (2013.01); H04L 7/0087 (2013.01); H04L 7/033 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A skew correcting device, comprising:
a plurality of samplers configured to sample first data based on a plurality of data clock signals with different phases; and
a plurality of edge selectors configured to:
determine to switch at least one data clock signal of the plurality of data clock signals to an edge clock signal according to a sampling result at the plurality of samplers; and
in response to an enable signal being at a third level, respectively output a selection signal, when a first level of a first output signal of a corresponding first sampler of the plurality of samplers differs from a second level of a second output signal of a second sampler of the plurality of samplers.