US 12,132,488 B2
Broadband frequency multiplier with harmonic suppression
Tolga Dinc, Dallas, TX (US); Sachin Kalia, Dallas, TX (US); and Swaminathan Sankaran, Allen, TX (US)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Dec. 30, 2022, as Appl. No. 18/148,845.
Prior Publication US 2024/0223168 A1, Jul. 4, 2024
Int. Cl. G06F 1/08 (2006.01); H03H 7/01 (2006.01); H03K 5/00 (2006.01)
CPC H03K 5/00006 (2013.01) [G06F 1/08 (2013.01); H03H 7/0115 (2013.01); H03H 7/0161 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A circuit comprising:
a quadrature phase generator circuit having differential generator inputs, in-phase differential generator outputs and quadrature-phase differential generator outputs;
a first frequency multiplier circuit having first differential multiplier inputs and a first multiplier output, wherein the first differential multiplier inputs are coupled to the in-phase differential generator outputs;
a second frequency multiplier circuit having second differential multiplier inputs and a second multiplier output, wherein the second multiplier differential inputs are coupled to the quadrature-phase differential generator outputs; and
a transformer that includes a primary inductor and a secondary inductor, wherein the primary inductor is coupled between the first and second multiplier outputs, and the secondary inductor is coupled between an output voltage terminal and a ground terminal.