US 12,132,093 B2
Base silicide on monocrystalline base structures
Ljubo Radic, Gilbert, AZ (US); Ronald Willem Arnoud Werkman, Groesbeek (NL); James Albert Kirchgessner, Tempe, AZ (US); and Jay Paul John, Chandler, AZ (US)
Assigned to NXP USA, Inc., Austin, TX (US)
Filed by NXP USA, INC., Austin, TX (US)
Filed on Jun. 7, 2022, as Appl. No. 17/805,774.
Prior Publication US 2023/0395692 A1, Dec. 7, 2023
Int. Cl. H01L 29/66 (2006.01); H01L 29/732 (2006.01); H01L 29/737 (2006.01)
CPC H01L 29/66242 (2013.01) [H01L 29/732 (2013.01); H01L 29/7378 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for forming a transistor, the method comprising:
forming a collector of a transistor;
forming a base of the transistor, the base including a monocrystalline base layer;
forming an emitter of the transistor;
forming a sacrificial material in contact with the monocrystalline base layer;
removing at least a portion of the sacrificial material;
after forming the emitter, forming a base silicide, the forming the base silicide includes:
forming at least a portion of the base silicide on a portion of the monocrystalline base layer exposed by the removing.