US 12,132,008 B2
Multidie supports and related methods
Michael J. Seddon, Gilbert, AZ (US); and Francis J. Carney, Mesa, AZ (US)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Jul. 19, 2022, as Appl. No. 17/813,357.
Application 17/813,357 is a continuation of application No. 16/862,120, filed on Apr. 29, 2020, granted, now 11,430,746.
Prior Publication US 2022/0352095 A1, Nov. 3, 2022
Int. Cl. H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/32 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/562 (2013.01) [H01L 23/31 (2013.01); H01L 23/32 (2013.01); H01L 25/0655 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first largest planar surface, a second largest planar surface and a thickness between the first largest planar surface and the second largest planar surface; and
a die support structure coupled to one of the first largest planar surface or the second largest planar surface;
wherein the semiconductor device has been singulated from a wafer;
wherein the first largest planar surface, the second largest planar surface, and the thickness are formed by at least two semiconductor die;
wherein the die support structure extends around a perimeter of one of the first largest planar surface or the second largest planar surface; and
wherein one of the first largest planar surface or the second largest planar surface is exposed through an opening in the die support structure.