US 12,132,003 B2
Electronic package and manufacturing method thereof
You-Chen Lin, Taichung (TW); Yu-Min Lo, Taichung (TW); Kuo-Hua Yu, Taichung (TW); and Jun-Hao Feng, Taichung (TW)
Assigned to SILICONWARE PRECISION INDUSTRIES CO., LTD., Taichung (TW)
Filed by SILICONWARE PRECISION INDUSTRIES CO., LTD., Taichung (TW)
Filed on Jan. 5, 2022, as Appl. No. 17/568,913.
Claims priority of application No. 110140357 (TW), filed on Oct. 29, 2021.
Prior Publication US 2023/0136541 A1, May 4, 2023
Int. Cl. H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 23/48 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/5383 (2013.01) [H01L 21/4857 (2013.01); H01L 21/486 (2013.01); H01L 23/5381 (2013.01); H01L 23/481 (2013.01); H01L 25/0655 (2013.01)] 26 Claims
OG exemplary drawing
 
1. An electronic package, comprising:
an electronic structure having a plurality of conductors;
a protection layer formed between the plurality of conductors of the electronic structure to continuously cover the plurality of conductors;
a dielectric layer having a plurality of grooves to enable the electronic structure to be bonded onto one side of the dielectric layer with the protection layer thereon, wherein the plurality of grooves penetrate through the dielectric layer, the protection layer is simultaneously disposed in the plurality of grooves and between the plurality of conductors, and each of the plurality of conductors is correspondingly accommodated in each of the plurality of grooves; and
a plurality of conductive components disposed on another side of the dielectric layer and electrically connected to the plurality of conductors.