US 12,132,000 B2
Semiconductor device structure and methods of forming the same
Shao-Kuan Lee, Kaohsiung (TW); Cheng-Chin Lee, Taipei (TW); Cherng-Shiaw Tsai, New Taipei (TW); Kuang-Wei Yang, Hsinchu (TW); Hsin-Yen Huang, New Taipei (TW); Hsiaokang Chang, Hsinchu (TW); and Shau-Lin Shue, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Aug. 28, 2021, as Appl. No. 17/460,168.
Prior Publication US 2023/0067886 A1, Mar. 2, 2023
Int. Cl. H01L 23/532 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/535 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 29/775 (2006.01); H01L 29/786 (2006.01)
CPC H01L 23/53276 (2013.01) [H01L 21/76834 (2013.01); H01L 21/76837 (2013.01); H01L 21/76852 (2013.01); H01L 21/76897 (2013.01); H01L 23/5226 (2013.01); H01L 23/53295 (2013.01); H01L 23/535 (2013.01); H01L 29/0665 (2013.01); H01L 29/0673 (2013.01); H01L 29/401 (2013.01); H01L 29/41733 (2013.01); H01L 29/42392 (2013.01); H01L 29/45 (2013.01); H01L 29/775 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An interconnection structure, comprising:
a dielectric layer;
a first conductive feature disposed in the dielectric layer;
a second conductive feature disposed over the first conductive feature, wherein the second conductive feature has a first height;
a third conductive feature disposed adjacent the second conductive feature;
a first dielectric material disposed between the second and third conductive features, wherein the first dielectric material has a second height greater than the first height;
a first one or more graphene layers disposed between the second conductive feature and the first dielectric material;
a second one or more graphene layers disposed between the third conductive feature and the first dielectric material;
an etch stop layer disposed on the first dielectric material;
a second dielectric material disposed on the etch stop layer; and
a fourth conductive feature disposed in the second dielectric material, wherein the fourth conductive feature is disposed over the second conductive feature and adjacent the first dielectric material.