US 12,131,791 B2
Semiconductor system including semiconductor device for performing defective analysis
Byung Goo Cho, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Nov. 29, 2022, as Appl. No. 18/070,606.
Claims priority of application No. 10-2022-0111424 (KR), filed on Sep. 2, 2022.
Prior Publication US 2024/0079077 A1, Mar. 7, 2024
Int. Cl. G11C 29/44 (2006.01); G11C 29/18 (2006.01); G11C 29/52 (2006.01)
CPC G11C 29/4401 (2013.01) [G11C 29/18 (2013.01); G11C 29/52 (2013.01); G11C 2029/1802 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor system comprising:
a controller configured to:
select a plurality of fail points based on defect analysis information collected in a process stage, and
provide an address designating at least one of the fail points together with a partial reset command; and
a semiconductor device including a plurality of functional regions each including one or more of the fail points, the semiconductor device configured to reset, in response to the partial reset command, a sequential circuit disposed in a target functional region corresponding to the address among the functional regions.