US 12,131,764 B2
Device, sensor node, access controller, data transfer method, and processing method in microcontroller
Masanori Natsui, Sendai (JP); Daisuke Suzuki, Sendai (JP); Akira Tamakoshi, Sendai (JP); Takahiro Hanyu, Sendai (JP); Tetsuo Endoh, Sendai (JP); and Hideo Ohno, Sendai (JP)
Assigned to TOHOKU UNIVERSITY, Sendai (JP)
Filed by TOHOKU UNIVERSITY, Sendai (JP)
Filed on Oct. 25, 2023, as Appl. No. 18/494,278.
Application 18/494,278 is a continuation of application No. 17/430,000, granted, now 11,862,217, previously published as PCT/JP2020/005928, filed on Feb. 15, 2020.
Claims priority of application No. 2019-026134 (JP), filed on Feb. 16, 2019.
Prior Publication US 2024/0071452 A1, Feb. 29, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 11/16 (2006.01); G06F 17/14 (2006.01)
CPC G11C 11/1673 (2013.01) [G06F 17/142 (2013.01); G11C 11/1653 (2013.01); G11C 11/1675 (2013.01); G11C 11/1697 (2013.01)] 6 Claims
OG exemplary drawing
 
1. An access controller, comprising:
an address-storing register configured to receive an input about an MRAM address that is a reading destination, the address-storing resister storing the address;
a multiplexer configured to output multiple destinations of the MRAM stored in the address-storing register to the MRAM for reading;
multiple data-storing registers configured to store data read from the MRAM; and
a comparator configured to receive a reading instruction together with a specified reading destination and to compare an address related to the specified reading destination with a reading address stored in the address-storing register, wherein
the access controller configured to receive a reading instruction together with a specified reading destination and to output data already read and stored in any one of the data-storing registers in response to the reading instruction when the comparator determines the data have been read from the MRAM in advance.