US 12,131,402 B2
Page faulting and selective preemption
Altug Koker, El Dorado Hills, CA (US); Ingo Wald, Salt Lake City, UT (US); David Puffer, Tempe, AZ (US); Subramaniam M. Maiyuran, Gold River, CA (US); Prasoonkumar Surti, Folsom, CA (US); Balaji Vembu, Folsom, CA (US); Guei-Yuan Lueh, San Jose, CA (US); Murali Ramadoss, Folsom, CA (US); Abhishek R. Appu, El Dorado Hills, CA (US); and Joydeep Ray, Folsom, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on May 20, 2022, as Appl. No. 17/749,275.
Application 17/749,275 is a division of application No. 16/924,895, filed on Jul. 9, 2020, granted, now 11,354,769.
Application 16/924,895 is a division of application No. 16/293,044, filed on Mar. 5, 2019, granted, now 10,726,517, issued on Jul. 28, 2020.
Application 16/293,044 is a division of application No. 15/482,808, filed on Apr. 9, 2017, granted, now 10,282,812, issued on May 7, 2019.
Prior Publication US 2022/0277413 A1, Sep. 1, 2022
Int. Cl. G06T 1/20 (2006.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/46 (2006.01); G06F 9/48 (2006.01)
CPC G06T 1/20 (2013.01) [G06F 9/3009 (2013.01); G06F 9/30185 (2013.01); G06F 9/3851 (2013.01); G06F 9/461 (2013.01); G06F 9/4843 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A graphics processor comprising:
a system interface; and
circuitry coupled with the system interface, the circuitry including an execution resource and a preemption status register, wherein the execution resource is configured to execute an instruction and during execution of the instruction, the execution resource is to:
receive a request to preempt execution of a thread associated with the instruction; and
based on a value stored in the preemption status register, execute at least one additional instruction after receipt of the request to preempt execution of the thread, wherein the preemption status register is to store a preemption hint including a multi-bit value that encodes an indication of an amount of register file space in use and a pending change in the amount of register file space in use.