CPC G06N 3/048 (2023.01) [G06F 1/03 (2013.01); G06F 7/5443 (2013.01); G06F 2207/4824 (2013.01)] | 20 Claims |
1. An arithmetic device comprising:
a multiplying-accumulating (MAC) circuit configured to perform a MAC arithmetic operation for weight data and vector data to generate an arithmetic result signal; and
an activation function (AF) circuit configured to extract a first bit group and a second bit group from the arithmetic result signal, configured to generate an input distribution signal based on the first bit group and the second bit group, and configured to select and output an output distribution signal that corresponds to the input distribution signal based on an activation function,
wherein the activation function circuit includes a look-up table, and
wherein a size of the look-up table corresponds to a number of bits of the first bit group.
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