US 12,131,055 B2
Continuous monotonic counter for memory devices
Yoav Yogev, Mazkeret-Batya (IL); Amichai Givant, Rosh-Ha'ain (IL); Amir Rochman, Tel-Aviv (IL); Shivananda Shetty, Fremont, CA (US); Pawan Singh, Cupertino, CA (US); and Yair Sofer, Tel-Aviv (IL)
Assigned to Infineon Technologies LLC, San Jose, CA (US)
Filed by Infineon Technologies LLC, San Jose, CA (US)
Filed on Jan. 30, 2023, as Appl. No. 18/102,825.
Application 18/102,825 is a continuation of application No. 16/906,892, filed on Jun. 19, 2020, granted, now 11,567,691.
Claims priority of provisional application 62/964,384, filed on Jan. 22, 2020.
Prior Publication US 2023/0244409 A1, Aug. 3, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0653 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0652 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
10. A method comprising:
storing, in a first counter of a non-volatile memory device, a first plurality of data values representing a plurality of count operations;
storing, in a second counter of the non-volatile memory device, a second plurality of data values representing an initiation and a completion of each erase operation performed on the first counter such that at least two data values are stored in the second counter to identify a success or failure of each erase operation of the first counter based on their data values and further represent a partial count value; and
generating, using one or more processors, a count value based on a current counter value of the first counter, a current counter value of the second counter, and at least one physical parameter of the first counter.