US 12,131,053 B2
Apparatus and method for erasing data programmed in a non-volatile memory block in a memory system multiple times
Jong-Min Lee, Seoul (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Apr. 11, 2023, as Appl. No. 18/298,374.
Application 18/298,374 is a continuation of application No. 17/412,568, filed on Aug. 26, 2021, granted, now 11,656,785.
Application 17/412,568 is a continuation of application No. 16/678,771, filed on Nov. 8, 2019, granted, now 11,537,315, issued on Dec. 27, 2022.
Claims priority of application No. 10-2019-0003825 (KR), filed on Jan. 11, 2019.
Prior Publication US 2023/0244408 A1, Aug. 3, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 16/04 (2006.01); G06F 3/06 (2006.01)
CPC G06F 3/0652 (2013.01) [G06F 3/0608 (2013.01); G06F 3/0673 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A memory system, comprising:
a memory device including a plurality of memory blocks and configured to perform a first erase operation and a second erase operation on the plurality of memory blocks and perform a program operation in the plurality of memory blocks; and
a controller configured to allocate a memory block, on which the first erase operation is performed, for programming data, check whether the allocated memory block is ready for programming the data, and determine whether to control the memory device to perform the second erase operation on the allocated memory block based on a result of the checking.