US 12,130,659 B2
Display device and electronic device
Shunpei Yamazaki, Setagaya (JP); and Yoshiharu Hirakata, Ebina (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed on Sep. 22, 2023, as Appl. No. 18/371,552.
Application 18/371,552 is a continuation of application No. 17/460,545, filed on Aug. 30, 2021, granted, now 11,803,209.
Application 17/460,545 is a continuation of application No. 16/218,739, filed on Dec. 13, 2018, granted, now 11,112,821, issued on Sep. 7, 2021.
Application 16/218,739 is a continuation of application No. 16/055,591, filed on Aug. 6, 2018, granted, now 10,437,283, issued on Oct. 8, 2019.
Application 16/055,591 is a continuation of application No. 14/010,869, filed on Aug. 27, 2013, granted, now 10,120,410, issued on Nov. 6, 2018.
Claims priority of application No. 2012-193575 (JP), filed on Sep. 3, 2012.
Prior Publication US 2024/0085944 A1, Mar. 14, 2024
Int. Cl. G06F 1/16 (2006.01); G02F 1/1333 (2006.01); G02F 1/1345 (2006.01); H05K 1/14 (2006.01)
CPC G06F 1/1601 (2013.01) [G06F 1/1626 (2013.01); G06F 1/1637 (2013.01); G02F 1/133305 (2013.01); G02F 1/133308 (2013.01); G02F 1/13452 (2013.01); G06F 1/1652 (2013.01); H05K 1/147 (2013.01)] 11 Claims
OG exemplary drawing
 
1. An electronic device comprising an active matrix display device, the electronic device comprising:
a housing;
a curved display surface;
a base between the housing and the curved display surface;
a first electronic circuit board;
a second electronic circuit board; and
a secondary battery,
wherein each of the first electronic circuit board, the second electronic circuit board, and the secondary battery is located between the base and the housing,
wherein, on a side of the curved display surface, the base comprises a region curved in a same direction as the curved display surface,
wherein, on a side of the housing, the base comprises a first region, a second region, and a third region deeper than each of the first region and the second region,
wherein the first electronic circuit board is mounted to overlap with the first region,
wherein the second electronic circuit board is mounted to overlap with the second region, and
wherein the secondary battery is mounted to overlap with the third region.