US 12,129,572 B2
Nitride semiconductor template, method for manufacturing nitride semiconductor template, and method for manufacturing nitride semiconductor free-standing substrate
Hajime Fujikura, Ibaraki (JP); and Taichiro Konno, Ibaraki (JP)
Assigned to SUMITOMO CHEMICAL COMPANY, LIMITED, Tokyo (JP)
Appl. No. 16/309,535
Filed by SUMITOMO CHEMICAL COMPANY, LIMITED, Tokyo (JP)
PCT Filed Jan. 24, 2017, PCT No. PCT/JP2017/002323
§ 371(c)(1), (2) Date Dec. 13, 2018,
PCT Pub. No. WO2017/216997, PCT Pub. Date Dec. 21, 2017.
Claims priority of application No. 2016-119576 (JP), filed on Jun. 16, 2016.
Prior Publication US 2020/0127163 A1, Apr. 23, 2020
Int. Cl. H01L 33/12 (2010.01); C23C 16/34 (2006.01); C30B 25/18 (2006.01); C30B 28/12 (2006.01); C30B 29/40 (2006.01); H01L 21/02 (2006.01); H01L 33/00 (2010.01); H01L 33/32 (2010.01)
CPC C30B 29/406 (2013.01) [C23C 16/34 (2013.01); C30B 25/183 (2013.01); C30B 28/12 (2013.01); H01L 21/0242 (2013.01); H01L 21/0243 (2013.01); H01L 21/02433 (2013.01); H01L 21/02458 (2013.01); H01L 21/0254 (2013.01); H01L 21/02609 (2013.01); H01L 21/0262 (2013.01); H01L 33/007 (2013.01); H01L 33/12 (2013.01); H01L 33/32 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A nitride semiconductor template, comprising:
a substrate having a diameter of 2 inches or more and having a front surface and a back surface opposite to the front surface;
a back side semiconductor layer provided on a back surface side of the substrate, comprising a polycrystalline group III nitride semiconductor, and having a linear expansion coefficient different from a linear expansion coefficient of the substrate; and
a front side semiconductor layer provided on a front surface side of the substrate, comprising a monocrystalline group III nitride semiconductor, and having a linear expansion coefficient different from a linear expansion coefficient of the substrate,
wherein surface roughness on the back surface of the substrate is larger than surface roughness on the front surface of the substrate,
a thickness of the front side semiconductor layer is more than 20 μm,
the front side semiconductor layer has no cracks, and
root mean square roughness on a front surface of the front side semiconductor layer is 2 nm or less in as-grown state.