| CPC H10N 52/00 (2023.02) [G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); G11C 11/18 (2013.01); H01F 10/3268 (2013.01); H01F 10/3286 (2013.01); H03K 19/18 (2013.01); H10B 61/22 (2023.02); H10N 52/01 (2023.02); H01F 10/329 (2013.01); H10N 50/85 (2023.02)] | 25 Claims |

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1. A logic device including:
a first electrically conductive layer;
a layer including a magnetoelectric material (ME layer) on the first electrically conductive layer;
a layer including a ferromagnetic material with in-plane magnetic anisotropy (FM layer) on the ME layer;
a middle layer on the FM layer, the middle layer including one of a second electrically conductive layer or an in-plane ferromagnetic layer;
a layer including a dielectric material on the middle layer (coupling layer);
a layer including a spin orbit coupling material (SOC layer) on the coupling layer; and
a layer including a ferromagnetic material with perpendicular magnetic anisotropy (PMA layer) on the SOC layer.
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