US 12,457,892 B2
Flexible TFT substrate, flexible display panel, and flexible display device
Zhiwei Song, Guangdong (CN); Shuai Zheng, Guangdong (CN); and Zhaosong Liu, Guangdong (CN)
Assigned to SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Guangdong (CN)
Appl. No. 17/754,386
Filed by Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Guangdong (CN)
PCT Filed Mar. 4, 2022, PCT No. PCT/CN2022/079180
§ 371(c)(1), (2) Date Mar. 31, 2022,
PCT Pub. No. WO2023/155250, PCT Pub. Date Aug. 24, 2023.
Claims priority of application No. 202210157602.2 (CN), filed on Feb. 21, 2022.
Prior Publication US 2024/0114762 A1, Apr. 4, 2024
Int. Cl. H10K 77/10 (2023.01); H10K 59/126 (2023.01); H10K 102/00 (2023.01)
CPC H10K 77/111 (2023.02) [H10K 59/126 (2023.02); H10K 2102/311 (2023.02)] 12 Claims
OG exemplary drawing
 
1. A flexible thin film transistor (TFT) substrate, wherein a display region and a bonding region are defined on the flexible TFT substrate, the bonding region is arranged on a periphery of the display region, the display region comprises a TFT region, a TFT is disposed in the TFT region, a plurality of concave structures are disposed in the bonding region, and an organic material is disposed in the concave structures,
wherein the flexible TFT substrate comprises a first flexible substrate, a first barrier layer, a second flexible substrate, a first adhesive layer, a second barrier layer, a second adhesive layer, a buffer layer, a semiconductor layer, a gate insulating layer, a gate, an interlayer dielectric layer, and a conductive layer stacked in sequence; the conductive layer comprises a source and a drain arranged in the TFT region; the semiconductor layer comprises an active layer disposed in the TFT region; the active layer is arranged corresponding to the gate; the active layer comprises a channel region and a source contact region and a drain contact region disposed at two ends of the channel region; the source is electrically connected to the source contact region via a source contact hole defined in the interlayer dielectric layer; the drain is electrically connected to the drain contact region through a drain contact hole defined in the interlayer dielectric layer; and the gate, the active layer, the source, and the drain together constitute the TFT.