| CPC H10K 59/40 (2023.02) [G06F 3/0412 (2013.01); G06F 3/0445 (2019.05); G09G 3/3266 (2013.01); H10K 59/122 (2023.02); H10K 59/131 (2023.02); H10K 59/873 (2023.02); H10K 59/88 (2023.02)] | 18 Claims |

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1. A display panel, comprising:
a substrate having a display area and a peripheral area located on at least one side of the display area;
a bonding area located on a side of the display area and in the peripheral area, wherein a bending area is arranged between the display area and the bonding area;
a gate driving circuit, which is at least partially located in the peripheral area and is configured to provide a gate driving signal for a light-emitting device in the display area; and
a touch structure located on a side of the light-emitting device away from the substrate, the touch structure comprising a touch electrode and an insulating layer,
wherein a control chip connecting terminal is arranged in the bonding area at a position close to the bending area, the control chip connecting terminal is electrically connected with the gate driving circuit, a contact pad is arranged on a side of the control chip connecting terminal away from the bending area, and at least a portion of the contact pad and at least a portion of the touch electrode are arranged in a same layer and made of a same material,
the second contact pad covers at least an edge of the first contact pad, and the second contact pad has a border region at a portion thereof away from the first contact pad, an orthographic projection of the border region on the substrate and an orthographic projection of the first contact pad on the substrate are not overlapped, and a height difference between the first contact pad and the border region is not less than 0.5 μm, and wherein
the display panel further comprises a buffer layer, a gate insulating layer, and an interlayer insulating layer, which are sequentially stacked, in the bonding area, the first contact pad being located on a side of the interlayer insulating layer away from the substrate, the planarization layer being located on the side of the interlayer insulating layer away from the substrate, and an orthographic projection of the planarization layer on the substrate at least overlapping with an orthographic projection of the second contact pad on the substrate,
wherein the insulating layer is in contact with the interlayer insulating layer in at least a part of the border region.
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