| CPC H10K 59/131 (2023.02) [H04N 23/55 (2023.01); H04N 23/56 (2023.01); H10K 59/1275 (2023.02)] | 26 Claims |

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1. A light emitting device in which (1) a first substrate including a first semiconductor substrate and a first wiring layer, (2) a second substrate including a second semiconductor substrate and a second wiring layer, and (3) a light emitting layer are stacked,
wherein the light emitting layer is arranged between (a) a structure including the first substrate and the second substrate and (b) a predetermined virtual plane,
wherein at least one of the first wiring layer and the second wiring layer includes a pad electrode,
wherein the light emitting layer and the structure include an aperture that exposes the pad electrode to the virtual plane,
wherein a plurality of first transistors forming a part of a pixel array portion including a plurality of pixels are provided in the first semiconductor substrate, and
wherein a plurality of second transistors forming a control circuit configured to control the pixel array portion are provided in the second semiconductor substrate.
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