US 12,457,863 B2
Display substrate and manufacturing method thereof, and display apparatus
Tian Dong, Beijing (CN)
Assigned to BOE Technology Group Co., Ltd., Beijing (CN)
Filed by BOE Technology Group Co., Ltd., Beijing (CN)
Filed on Sep. 29, 2021, as Appl. No. 17/489,771.
Application 17/489,771 is a continuation in part of application No. 17/256,006, granted, now 12,041,826, previously published as PCT/CN2020/124967, filed on Oct. 29, 2020.
Claims priority of application No. 201911038883.4 (CN), filed on Oct. 29, 2019; and application No. 201911082352.5 (CN), filed on Nov. 7, 2019.
Prior Publication US 2022/0328600 A1, Oct. 13, 2022
Int. Cl. H10K 59/131 (2023.01); H10K 59/121 (2023.01); H10K 59/35 (2023.01)
CPC H10K 59/131 (2023.02) [H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/353 (2023.02)] 18 Claims
OG exemplary drawing
 
1. A display substrate, comprising:
a plurality of gate lines, a plurality of data lines, a plurality of power lines and a plurality of sub-pixels arranged on a base substrate, wherein:
at least one sub-pixel of the plurality of sub-pixels comprises a light-emitting device and a driving circuit configured to drive the light-emitting device to emit light, and the driving circuit comprises a plurality of transistors and a storage capacitor;
in a plane perpendicular to the display substrate, the base substrate and a plurality of functional layers are arranged on the base substrate;
the plurality of functional layers comprises a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer and a fourth conductive layer which are sequentially arranged;
a first insulating layer, a second insulating layer, a third insulating layer and a fourth insulating layer are respectively arranged between the plurality of functional layers;
in an extension direction of the gate lines, the power lines are connected with each other through at least one functional layer of the plurality of functional layers;
in an extension direction of the data lines, the power lines comprise a plurality of sub-power lines connected sequentially, and at least one sub-power line is arranged in one sub-pixel;
a sub-power line of at least one sub-pixel comprises a plurality of power supply parts connected sequentially, and there is an included angle of greater than 90 degrees and smaller than 180 degrees between at least one power supply part and a power supply part connected with the at least one power supply part; and
one power supply part of the at least one power supply part and the power supply part connected with the at least one power supply part is arranged in parallel with the data lines.