| CPC H10D 86/60 (2025.01) [G02F 1/136209 (2013.01); G02F 1/136222 (2021.01); G02F 1/136286 (2013.01); H10D 86/441 (2025.01)] | 20 Claims |

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1. An array substrate, comprising:
a base plate;
a plurality of gate lines, a plurality of data lines, and a plurality of pixel units, which are all on the base plate, wherein the plurality of gate lines cross over the plurality of data lines to define the plurality of pixel units, each of the plurality of pixel units comprises a display electrode, the display electrode comprises at least one electrode portion, each electrode portion comprises a main chain electrode and a plurality of branch chain electrodes, and the plurality of branch chain electrodes are all electrically connected to the main chain electrode; and
a black matrix layer on a side of the pixel units distal to the base plate, wherein the black matrix layer comprises a plurality of openings and a light shielding portion, an orthogonal projection of each opening on the base plate covers orthogonal projections of the branch chain electrodes of one corresponding display electrode on the base plate, and an orthogonal projection of the light shielding portion on the base plate covers orthogonal projections of the gate lines, the data lines and the main chain electrode on the base plate.
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