US 12,457,794 B2
Dual side contact structures for source/drain regions in semiconductor transistor devices and method of forming
Shih-Chuan Chiu, Hsinchu (TW); Chia-Hao Chang, Hsinchu (TW); Cheng-Chi Chuang, New Taipei (TW); Chih-Hao Wang, Baoshan Township (TW); Huan-Chieh Su, Tianzhong Township (TW); Chun-Yuan Chen, Hsinchu (TW); Li-Zhen Yu, New Taipei (TW); and Yu-Ming Lin, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 29, 2024, as Appl. No. 18/591,290.
Application 18/591,290 is a continuation of application No. 17/815,761, filed on Jul. 28, 2022, granted, now 11,955,515.
Application 17/815,761 is a continuation of application No. 17/238,983, filed on Apr. 23, 2021, granted, now 11,482,595.
Prior Publication US 2024/0204046 A1, Jun. 20, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H10D 84/01 (2025.01); H10D 30/67 (2025.01)
CPC H10D 84/013 (2025.01) [H10D 30/6735 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a source/drain (S/D) region; and
a contact structure, comprising:
a silicide layer disposed on the S/D region;
a first metal layer disposed on and in physical contact with the silicide layer;
a second metal layer disposed on the first metal layer;
a metal alloy layer disposed between the first and second metal layers; and
a third metal layer disposed on the second metal layer.