| CPC H10D 64/62 (2025.01) [H10D 64/01 (2025.01)] | 20 Claims |

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1. A semiconductor device comprising:
a semiconductor structure that includes a substrate, two source/drain regions disposed in the substrate, a first dielectric feature disposed over the substrate, a gate structure disposed in the first dielectric feature and between the source/drain regions, a second dielectric feature disposed over the first dielectric feature, and a contact feature that is disposed in the second dielectric feature and that is connected to at least one of the source/drain regions and the gate structure;
a conductive nitride feature that includes metal nitride or alloy nitride, that is disposed in the second dielectric feature, and that is connected to the contact feature;
a third dielectric feature that is disposed over the second dielectric feature; and
a conductive line feature that is disposed in the third dielectric feature and that is connected to the conductive nitride feature opposite to the contact feature,
wherein the conductive nitride feature is amorphous.
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