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1. A manufacturing method of a power semiconductor device, comprising: providing a substrate with a front side and a back side arranged relatively, forming an epitaxial layer on the front side of the substrate, the epitaxial layer comprising a cell region and a termination region adjacently arranged in a first plane, and the termination region surrounding the cell region; forming an active region within the cell region of the epitaxial layer and forming a cell structure in the active region; forming a plurality of first trenches in the cell region of the epitaxial layer, and forming a plurality of second trenches in the termination region of the epitaxial layer, the plurality of the first trenches passing through the active region and the epitaxial layer and entering the substrate along a first direction, and the plurality of the second trenches passing through the epitaxial layer to the substrate along the first direction; forming a first resistive field plate structure in each first trench, and forming a second resistive field plate structure in each second trench; and forming a first electrode, a second electrode and a third electrode independent of each other on the epitaxial layer, forming a fourth electrode on the back side of the substrate, the first electrode ohmically contacting each first resistive field plate structure, the second electrode ohmically contacting each second resistive field plate structure, the third electrode ohmically contacting each second resistive field plate structure, and the fourth electrode ohmically contacting each first resistive field plate structure and each second resistive field plate structure respectively through the substrate, wherein the first plane is parallel to the front side of the substrate, the first direction is perpendicular to the first plane, the plurality of the first trenches and the plurality of the second trenches are formed by the same process.
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