| CPC H10D 62/121 (2025.01) [H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/292 (2025.01); H10D 64/017 (2025.01); H10D 84/83 (2025.01)] | 20 Claims |
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1. An integrated circuit device, comprising:
a substrate;
a plurality of gate structures oriented along a first direction in a horizontal dimension above the substrate;
a plurality of elongated channel regions oriented along a second direction in the horizontal dimension, the second direction being perpendicular to the first direction, wherein the elongated channel regions pass through at least one of the gate structures, and wherein the elongated channel regions include two or more nanosheet fins stacked in a vertical dimension above the substrate;
a first stage including at least two of the elongated channel regions, the nanosheet fins in a first of the at least two elongated channel regions of the first stage having a first width along the first direction in the horizontal dimension, the nanosheet fins in a second of the at least two elongated channel regions of the first stage having a second width along the first direction in the horizontal dimension, the second width being larger than the first width; and
a second stage including at least one other of the elongated channel regions, the nanosheet fins in the at least one other elongated channel region of the second stage having a third width along the first direction in the horizontal dimension, the third width being larger than the first width.
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