| CPC H10D 30/637 (2025.01) [H10D 30/022 (2025.01); H10D 30/023 (2025.01); H10D 30/603 (2025.01); H10D 30/615 (2025.01); H10D 62/314 (2025.01); H10D 64/512 (2025.01); H10F 30/282 (2025.01); H01L 21/26513 (2013.01); H01L 21/26586 (2013.01)] | 6 Claims |
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1. A DEPFET transistor comprising:
a semiconductor substrate of a first conductivity type having a first main surface and a second main surface that are opposite to each other,
a field effect transistor portion formed at the first main surface, which field effect transistor portion comprises a source connection region of a second conductivity type, a drain connection region of a second conductivity type, a channel region arranged between the source connection region and the drain connection region and a gate electrode above the channel region (10) that is separated from the channel region by a gate insulator,
a back side control region of a second conductivity type formed at the second main surface,
a substrate doping enhancement region of a first conductivity type formed at the first main surface at least below the source connection region and below the channel region,
wherein the substrate doping enhancement region comprises a signal charge control region of the first conductivity type below the gate electrode, in which the effective doping dose has a higher value than at other positions of the substrate doping enhancement region,
wherein in an orthogonal projection onto the plane of the first main surface a resistance region in the form of a doping region of a second conductivity type is formed between the drain connection region and the signal charge control region, the doping dose of the doping region being smaller than the one of the drain connection region.
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