US 12,457,762 B2
Cross bar vertical FETs
Brent A. Anderson, Jericho, VT (US); Junli Wang, Slingerlands, NY (US); Indira Seshadri, Niskayuna, NY (US); Ruilong Xie, Niskayuna, NY (US); and Dechao Guo, Niskayuna, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Dec. 15, 2021, as Appl. No. 17/644,528.
Prior Publication US 2023/0187541 A1, Jun. 15, 2023
Int. Cl. H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 64/01 (2025.01)
CPC H10D 30/0243 (2025.01) [H10D 30/6212 (2025.01); H10D 64/015 (2025.01)] 9 Claims
OG exemplary drawing
 
1. A vertical field effect transistor (VFET), comprising:
a first vertical channel;
a second vertical channel, wherein the first and second vertical channels extend in a first direction;
a horizontal channel disposed between the first and second vertical channels and extending in a second direction substantially perpendicular to the first direction, wherein the horizontal channel comprises:
a first end, wherein the first end and the first vertical channel are separated by a first gap; and
a second end opposite the first end, wherein the second end and the second vertical channel are separated by a second gap that is different than the first gap, and wherein the first end is closer to the first vertical channel than the second end; and
a source region and a drain region coupled to the first and second vertical channels.