US 12,457,761 B2
Monolithic integration of enhancement-mode and depletion-mode galium nitride high electron mobility transistors
Elias Al Alam, Gloucester (CA); and Alireza Loghmany, Kanata (CA)
Assigned to NATIONAL RESEARCH COUNCIL OF CANADA, Ottawa (CA)
Appl. No. 18/252,973
Filed by NATIONAL RESEARCH COUNCIL OF CANADA, Ottawa (CA)
PCT Filed Nov. 3, 2021, PCT No. PCT/IB2021/060186
§ 371(c)(1), (2) Date May 15, 2023,
PCT Pub. No. WO2022/101740, PCT Pub. Date May 19, 2022.
Claims priority of provisional application 63/114,239, filed on Nov. 16, 2020.
Prior Publication US 2024/0014291 A1, Jan. 11, 2024
Int. Cl. H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 62/17 (2025.01); H10D 62/85 (2025.01)
CPC H10D 30/015 (2025.01) [H10D 30/475 (2025.01); H10D 62/221 (2025.01); H10D 62/8503 (2025.01)] 15 Claims
OG exemplary drawing
 
1. A method of fabricating a wafer containing a plurality of high-electron-mobility transistors (HEMTs), the method comprising:
providing semiconductor layers capable of sustaining a two-dimensional electron sheet to enable electrical current to flow through the HEMTs,
wherein the semiconductor layers comprise a first layer of aluminum gallium nitride (AlGaN) and a second layer of gallium nitride (GaN),
whereby the concentration of Al and thickness of AlGaN give rise to a characteristic threshold voltage;
for a first one of said HEMTs:
forming a series of first trenches and first fins in the semiconductor layers over a first active area of the semiconductor layers on which a first gate contact terminal of the first one of said HEMTs is to be set down,
wherein the width of the first fins is chosen to shift the characteristic threshold voltage to a new threshold voltage;
setting down the first gate contact terminal across the first fins; and
setting down a first source contact terminal and a first drain contact terminal on either side of the first gate contact terminal outside of the first active area; and
for a further one of said HEMTs:
forming a series of further trenches and further fins in the semiconductor layers over a further active area of the semiconductor layers on which a further gate contact terminal of the HEMT is to be set down,
wherein the width of the further fins is less than the width of the first fins to shift the characteristic threshold voltage below the new threshold voltage of the first one of said HEMTs;
setting down a further gate contact terminal across the further series of fins; and
setting down a further source contact terminal and a further drain contact terminal on either side of the further gate contact terminal outside of the further active area,
wherein the width of each of the first fins is selected to increase the characteristic threshold voltage such that the first one of said HEMTs operates as a depletion mode HEMT, and
wherein the width of the further fins is selected to decrease the characteristic threshold voltage to a voltage such that the further one of said HEMTs operates as an enhancement mode HEMT.