| CPC H10D 30/01 (2025.01) [H01L 21/02527 (2013.01); H01L 21/0262 (2013.01); H01L 21/0415 (2013.01); H10D 62/8303 (2025.01)] | 3 Claims |

|
1. A diamond field effect transistor comprising:
a first diamond layer;
a gate insulating film including a silicon oxide film provided on a surface of the first diamond layer;
a source region and a drain region provided on the surface of the first diamond layer so as to be separated from each other; and
a gate electrode provided on the gate insulating film, wherein
a silicon-terminated layer containing C—Si bonds formed of bonds between carbon atoms and silicon atoms is provided at an interface between the first diamond layer and the gate insulating film;
wherein the source region and the drain region are second diamond layers formed in regions on the surface of the first diamond layer other than a region where the silicon oxide film is formed; and
wherein the diamond field effect transistor further comprises:
a source electrode and a drain electrode provided on surfaces of the second diamond layers in the source region and the drain region and respectively connected to the source region and the drain region at predetermined intervals from end portions of the source region and the drain region, wherein
a hydrogen-terminated layer containing C—H bonds formed of a bond between a carbon atom and a hydrogen atom is provided on the surface of the second diamond layer at least within the predetermined interval.
|