US 12,457,745 B2
Semiconductor memory device
Yusuke Okumura, Yokkaichi (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Aug. 1, 2022, as Appl. No. 17/816,501.
Claims priority of application No. 2022-038288 (JP), filed on Mar. 11, 2022.
Prior Publication US 2023/0292517 A1, Sep. 14, 2023
Int. Cl. H10B 41/50 (2023.01); H01L 23/528 (2006.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/50 (2023.01)
CPC H10B 43/35 (2023.02) [H01L 23/5283 (2013.01); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02)] 9 Claims
OG exemplary drawing
 
1. A semiconductor memory device, comprising:
a plurality of conductive layers arranged separated from each other in a first direction, each of the plurality of conductive layers including a first portion, and a second portion that is provided so as not to be overlapped with an upper conductive layer, and that is thicker than the first portion in the first direction;
a first insulator portion that extends in a second direction intersecting the first direction, and that contacts the second portion of a first conductive layer of the plurality of conductive layers, and the second portion of a second conductive layer of the plurality of conductive layers; and
a second insulator portion that extends in the second direction, sandwiches, in a third direction intersecting the first direction and the second direction, together with the first insulator portion, the second portion of the first conductive layer, the second portion of the second conductive layer, and the second portion of a third conductive layer of the plurality of conductive layers, and contacts the second portion of the third conductive layer, wherein
the second portion of the second conductive layer includes a first sub portion arranged in the second direction with the second portion of the first conductive layer, and a second sub portion provided between the second portion of the first conductive layer and the second portion of the third conductive layer.