| CPC H10B 12/053 (2023.02) [H10B 12/34 (2023.02)] | 17 Claims |
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1. A method of manufacturing a semiconductor device, comprising:
forming a trench in a substrate;
disposing a lower gate electrode in the trench;
disposing a first dielectric layer on the lower gate electrode in the trench;
partially removing the first dielectric layer to expose a portion of the lower gate electrode, wherein a remained first dielectric layer covers another portion of the lower gate electrode;
disposing a first barrier layer on the portion of the lower gate electrode; and
forming a coplanar surface of the first barrier layer and the first dielectric layer.
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