| CPC H04W 72/542 (2023.01) [H04B 17/318 (2015.01); H04L 5/0051 (2013.01); H04L 5/0053 (2013.01); H04W 56/001 (2013.01); H04W 72/0446 (2013.01); H04W 72/1273 (2013.01); H04W 72/23 (2023.01); H04L 27/2602 (2013.01)] | 20 Claims |

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1. An apparatus comprising:
one or more processors; and
computer-readable media storing instructions that, when executed by the one or more processors, cause the one or more processors to perform operations comprising:
receiving a slot of data transmitted by a base station (BS), wherein the slot of data comprises a sequence of symbols, and wherein the slot of data comprises:
a first Synchronization Signal Block (SSB) comprising a first subset of the symbols,
a second SSB subsequent to the first SSB, the second SSB comprising a second subset of the symbols, and
a third subset of the symbols preceding the first subset of the symbols and the second subset of the symbols;
determining a quality of a wireless channel between the BS and a user equipment (UE), wherein determining the quality of the wireless channel comprises:
receiving configuration data indicating whether to select a first configuration for determining a first metric for a first interval extending from a sequentially first symbol of the slot of data to a sequentially last symbol of the second subset of symbols and having an index of 12, and
determining the quality of the wireless channel based on the configuration data; and
transmitting an indication of the quality of the wireless channel to the BS.
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