| CPC H04W 72/23 (2023.01) [H04W 72/0446 (2013.01); H04W 72/0453 (2013.01)] | 7 Claims | 

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               1. An integrated circuit, comprising: 
            generation circuitry which, in operation, controls of a generation of first downlink control information (DCI) used for a first coverage enhancement (CE) level, the first DCI including frequency domain information and time domain information, the frequency domain information indicating a number of physical resource blocks (PRBs) from a plurality of candidates for the number of PRBs in a frequency domain within a narrowband which is a part of a bandwidth, and the time domain information indicating a number of repetitions in a time domain; and 
                a transmission circuitry which, in operation, controls a transmission of a physical downlink shared channel (PDSCH) using the number of PRBs and the number of repetitions in the time domain, 
                wherein a number of bits of the first DCI is smaller than that of second DCI used for a second CE level, the second CE level being lower than the first CE level. 
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