US 12,457,436 B2
Solid-state imaging element, imaging device, and solid-state imaging element control method
Luonghung Asakura, Kanagawa (JP); and Minoru Sakata, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 18/687,138
Filed by Sony Semiconductor Solutions Corporation, Kanagawa (JP)
PCT Filed Aug. 23, 2022, PCT No. PCT/JP2022/031686
§ 371(c)(1), (2) Date Feb. 27, 2024,
PCT Pub. No. WO2023/062947, PCT Pub. Date Apr. 20, 2023.
Claims priority of application No. 2021-169351 (JP), filed on Oct. 15, 2021.
Prior Publication US 2024/0397239 A1, Nov. 28, 2024
Int. Cl. H04N 25/78 (2023.01); H04N 25/77 (2023.01)
CPC H04N 25/78 (2023.01) [H04N 25/77 (2023.01)] 23 Claims
OG exemplary drawing
 
23. A solid-state imaging element control method comprising:
a conversion efficiency control procedure of controlling conversion efficiency at a time of conversion of a charge into a voltage by opening and closing a path between a floating diffusion layer and an additional capacitance;
an upstream amplification procedure of amplifying the voltage generated from the charge with the conversion efficiency and outputting the voltage to an upstream node;
a selecting procedure of connecting any of a plurality of capacitive elements that hold the output voltage to a downstream node; and
a downstream procedure of sequentially reading out and outputting the voltage held at the plurality of capacitive elements, via the downstream node.