| CPC H04N 25/59 (2023.01) [H04N 25/53 (2023.01); H04N 25/531 (2023.01); H04N 25/583 (2023.01); H04N 25/585 (2023.01); H04N 25/616 (2023.01); H04N 25/62 (2023.01); H04N 25/703 (2023.01); H04N 25/75 (2023.01); H04N 25/778 (2023.01); H10F 39/18 (2025.01); H10F 39/8037 (2025.01)] | 14 Claims |
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1. A method for operating a pixel arrangement comprising a photodetector, the method comprising:
during an exposure period:
accumulating, by the photodetector, in a first integration period, charge carriers;
pulsing, at an end of the first integration period, a transfer transistor to a first voltage level for transferring a portion of the accumulated charge carriers to a diffusion node, wherein the portion is configured to be drained to a supply voltage;
continuing, by the photodetector, to accumulate, in a second integration period, charge carriers;
after the second integration period, pulsing the transfer transistor to a respective further voltage level with at least one additional pulse,
wherein, with each additional pulse, an additional portion of the accumulated charge carriers is configured to be drained to the supply voltage, and
wherein each additional pulse is followed by an additional continued accumulation of charge carriers in a respective additional integration period with the photodetector;
during a storage period:
pulsing the transfer transistor to the first voltage level for transferring a first part of the accumulated charge carriers to the diffusion node;
storing a low conversion gain signal representing the first part of the accumulated charge carriers on at least a second capacitor coupled to the diffusion node;
pulsing the transfer transistor to a full voltage level for transferring a remaining part of the accumulated charge carriers to the diffusion node; and
storing a high conversion gain signal representing the remaining part of the accumulated charge carriers on a first capacitor coupled to the diffusion node; and
during a readout period:
reading out the low conversion gain signal and the high conversion gain signal stored on the first and second capacitors; and
performing correlated double sampling by using the low conversion gain signal as a reference level for the high conversion gain signal.
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