US 12,457,360 B2
Image processing device and image processing method
Kenji Kondo, Tokyo (JP)
Assigned to SONY GROUP CORPORATION, Tokyo (JP)
Appl. No. 17/784,667
Filed by Sony Group Corporation, Tokyo (JP)
PCT Filed Dec. 18, 2020, PCT No. PCT/JP2020/047393
§ 371(c)(1), (2) Date Jun. 13, 2022,
PCT Pub. No. WO2021/125317, PCT Pub. Date Jun. 24, 2021.
Claims priority of provisional application 62/951,177, filed on Dec. 20, 2019.
Prior Publication US 2023/0009580 A1, Jan. 12, 2023
Int. Cl. H04N 19/00 (2014.01); H04N 19/176 (2014.01); H04N 19/593 (2014.01)
CPC H04N 19/593 (2014.11) [H04N 19/176 (2014.11)] 12 Claims
OG exemplary drawing
 
1. An image processing device comprising:
circuitry that
when performing matrix-based intra prediction that is intra prediction using a matrix operation on a current prediction block to be encoded, performs the matrix-based intra prediction using a coefficient related to a sum of change amounts of pixel values and set to a fixed value,
generates a predicted image of the current prediction block, and
encodes the current prediction block using the predicted image generated,
wherein the circuitry performs the matrix-based intra prediction according to an operation including a weight matrix in which matrix values are offset according to at least the coefficient, and
the coefficient is only one of a value represented by a power of two or a value represented as a sum of powers of two.