US 12,456,987 B2
Analog-to-digital conversion circuit, integrated chip, display device, and analog-to-digital conversion method
Yifan Song, Beijing (CN); Xinle Wang, Beijing (CN); Wenchao Han, Beijing (CN); Mingming Wang, Beijing (CN); Wanzhi Chen, Beijing (CN); Jing Liu, Beijing (CN); and Zhengri Lin, Beijing (CN)
Assigned to Beijing BOE Optoelectronics Technology Co., Ltd., Beijing (CN); and Beijing BOE Technology Development Co., Ltd., Beijing (CN)
Appl. No. 18/561,733
Filed by Beijing BOE Optoelectronics Technology Co., Ltd., Beijing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed May 19, 2021, PCT No. PCT/CN2021/094731
§ 371(c)(1), (2) Date Nov. 17, 2023,
PCT Pub. No. WO2022/241698, PCT Pub. Date Nov. 24, 2022.
Prior Publication US 2024/0275397 A1, Aug. 15, 2024
Int. Cl. H03M 1/12 (2006.01)
CPC H03M 1/1245 (2013.01) 18 Claims
OG exemplary drawing
 
1. An analog-to-digital conversion circuit, comprising:
a first conversion circuit, configured to convert an original analog signal to obtain a first digital signal with a first bit width;
at least one voltage division circuit, each voltage division circuit among which is configured to divide a voltage of a first-stage analog signal to obtain a second-stage analog signal, wherein the first-stage analog signal is the original analog signal or a second-stage analog signal output by a previous voltage division circuit adjacent to the voltage division circuit;
a second conversion circuit corresponding to the voltage division circuit, configured to convert the received second-stage analog signal according to a preset algorithm to obtain a second digital signal with a second bit width; and
a control calculation circuit, configured to obtain a target digital signal with a third bit width according to the first digital signal and the second digital signal;
wherein the third bit width is larger than the first bit width, and the third bit width is larger than the second bit width; and
wherein each voltage division circuit comprises a plurality of voltage division resistors, and a first switching transistor corresponding to each voltage division resistor;
the plurality of voltage division resistors are connected in series;
in the voltage division resistors which are connected in series, a first end of each voltage division resistor is connected with a first end of the corresponding first switching transistor;
second ends of the first switching transistor are connected to each other and a second end of each first switching transistor is connected to the second conversion circuit corresponding to the voltage division circuit, and a control end of each first switching transistor is connected to the control calculation circuit; and
a first end of a first voltage division resistor is used for inputting the first-stage analog signal, and a second end of a last voltage division resistor is grounded.