US 12,456,984 B2
PVT stabilization of pipelined SAR ADC
Christer Jansson, Linköping (SE); and Mattias Palm, Bara (SE)
Assigned to TELEFONAKTIEBOLAGET LM ERICSSON (PUBL), Stockholm (SE)
Appl. No. 18/038,675
Filed by Telefonaktiebolaget LM Ericsson (publ), Stockholm (SE)
PCT Filed Dec. 3, 2020, PCT No. PCT/EP2020/084556
§ 371(c)(1), (2) Date May 24, 2023,
PCT Pub. No. WO2022/117200, PCT Pub. Date Jun. 9, 2022.
Prior Publication US 2023/0421164 A1, Dec. 28, 2023
Int. Cl. H03M 1/06 (2006.01); H04B 1/40 (2015.01)
CPC H03M 1/0604 (2013.01) [H04B 1/40 (2013.01)] 34 Claims
OG exemplary drawing
 
1. A pipeline Successive Approximation Register (SAR) Analog to Digital Converter (ADC) including at least two SAR stages and a residual amplifier (RA) between each two SAR stages, the pipeline SAR ADC comprising:
a common mode (CM) voltage generator configured to generate a CM voltage, VCM(PVT), that depends on Process, Temperature, and Voltage (PVT) characteristics of the pipeline SAR ADC;
wherein inputs of comparators in at least the first SAR stage are biased by VCM(PVT), whereby at least the first SAR stage operating point is independent of PVT variations.