US 12,456,980 B2
Interface circuit
Fei Xiao, Beijing (CN); and Lei Tan, Beijing (CN)
Assigned to SG MICRO CORP, Beijing (CN)
Appl. No. 18/260,098
Filed by SG MICRO CORP, Beijing (CN)
PCT Filed Oct. 21, 2021, PCT No. PCT/CN2021/125335
§ 371(c)(1), (2) Date Jun. 30, 2023,
PCT Pub. No. WO2022/142624, PCT Pub. Date Jul. 7, 2022.
Claims priority of application No. 202011605107.0 (CN), filed on Dec. 30, 2020.
Prior Publication US 2024/0056079 A1, Feb. 15, 2024
Int. Cl. H03K 19/0185 (2006.01); H03K 19/00 (2006.01); H03K 19/003 (2006.01)
CPC H03K 19/018507 (2013.01) [H03K 19/0027 (2013.01); H03K 19/00315 (2013.01)] 6 Claims
OG exemplary drawing
 
1. An interface circuit comprising a signal input terminal and a signal output terminal, wherein the interface circuit further comprises:
a current input circuit, connected with the signal input terminal, and configured to receive an input current signal of the signal input terminal;
an input voltage detection circuit, connected with the signal input terminal, and configured to compare an input voltage signal of the signal input terminal with a reference voltage to obtain a comparison result and provide a detection signal to the current input circuit according to the comparison result;
a phase-inversion output circuit, connected with the current input circuit at a first node, and configured to generate a voltage conversion signal according to a voltage potential of the first node; and
a buffer circuit, connected with the phase-inversion output circuit and the signal output terminal, and configured to perform signal shaping on the voltage conversion signal to obtain an output signal and provide the output signal to the signal output terminal,
wherein, the current input circuit is configured to charge the first node under a condition that the detection signal indicates that the input voltage signal is greater than the reference voltage and the input current signal is greater than a reference current, so as to raise the voltage potential of the first node,
wherein the current input circuit comprises a first current source, a first switch transistor and a second current source which are sequentially connected in series between the power supply voltage and ground,
wherein an intermediate node between the first current source and the first switch transistor are connected with the signal input terminal,
wherein an intermediate node between the second current source and the first switch transistor is connected to the phase-inversion output circuit at the first node, and the first switch transistor is controlled to be turned on and off by the detection signal.