| CPC H03K 17/6874 (2013.01) [H04B 1/123 (2013.01)] | 20 Claims |
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1. An electronic device, comprising:
a current source configured to generate a bias current in accordance with a data rate of data carried by a pair of differential input signals;
two differential transistor groups coupled to the current source, wherein:
a subset of the two differential transistor groups is configured to be driven by the bias current to generate a pair of differential output signals from the pair of differential input signals; and
the two differential transistor groups include a first plurality of transistors configured to receive a first input signal and a second plurality of transistors configured to receive a second input signal, and the first and second input signals form the pair of differential input signals; and
a controller configured to generate a multibit control signal enabling multiple distinct levels for the bias current according to the data rate of the data carried by the pair of differential input signals, the control signal being distinct from the pair of differential input signals, wherein the control signal is configured to select the subset of the two differential transistor groups proportional to the bias current, such that each of the first plurality of transistors and the second plurality of transistors in the two differential transistor groups maintains substantially constant DC operating points independently of the data rate to ensure consistent performance of the two differential transistor groups.
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