US 12,456,957 B2
Amplitude and phase error correction in a wireless communication circuit
Nadim Khlat, Cugnaux (FR)
Assigned to Qorvo US, Inc., Greensboro, NC (US)
Filed by Qorvo US, Inc., Greensboro, NC (US)
Filed on Dec. 22, 2023, as Appl. No. 18/394,376.
Claims priority of provisional application 63/466,801, filed on May 16, 2023.
Claims priority of provisional application 63/480,785, filed on Jan. 20, 2023.
Prior Publication US 2024/0388270 A1, Nov. 21, 2024
Int. Cl. H04K 1/02 (2006.01); H03F 3/24 (2006.01); H03G 3/30 (2006.01); H03G 5/16 (2006.01); H04L 25/03 (2006.01); H04L 25/49 (2006.01)
CPC H03G 3/3042 (2013.01) [H03F 3/245 (2013.01); H03G 5/165 (2013.01); H03G 2201/103 (2013.01); H03G 2201/307 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A transceiver circuit comprising:
a frequency equalization circuit configured to apply a frequency equalization filter to an input vector to thereby generate a frequency-equalized input vector having a respective linearized gain error and a respective linearized phase error in each of a plurality of modulation frequencies;
a gain error correction circuit configured to determine a linearized gain error correction term in a selected modulation frequency among the plurality of modulation frequencies based on the respective linearized gain error in a reference modulation frequency among the plurality of modulation frequencies;
a phase error correction circuit configured to determine a linearized phase error correction term in the selected modulation frequency based on the respective linearized phase error in the reference modulation frequency; and
an amplitude-phase correction circuit configured to add the linearized gain error correction term and the linearized phase error correction term to the frequency-equalized input vector to thereby generate an amplitude-phase corrected input vector in the selected modulation frequency.