US 12,456,675 B2
Method for producing an interconnect via
Pieter Weckx, Bunsbeek (BE)
Assigned to Imec vzw, Leuven (BE)
Filed by Imec vzw, Leuven (BE)
Filed on Oct. 5, 2021, as Appl. No. 17/494,087.
Claims priority of application No. 20200264 (EP), filed on Oct. 6, 2020.
Prior Publication US 2022/0108948 A1, Apr. 7, 2022
Int. Cl. H01L 23/522 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/31144 (2013.01); H01L 21/76831 (2013.01); H01L 21/76832 (2013.01); H01L 21/7684 (2013.01); H01L 21/76879 (2013.01); H01L 21/76897 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
producing on a substrate a stack of:
a first layer comprising a first dielectric material,
a second layer comprising dielectric material on the first layer, and
an etch stop layer between the first layer and the second layer,
etching a trench through the second layer, then through the etch stop layer, and then through the first layer,
producing a lower conductive line in the trench,
producing a third layer comprising a second dielectric material in the trench and on the lower conductive line,
removing a first portion of the second layer, such that a second portion of the second layer remains in contact with the etch stop layer,
etching a via opening through the third layer in the trench, using the second portion of the second layer as a mask, and
depositing a conductive upper line and an interconnect via on the lower conductive line within the via opening.